产品分类 > 开关 > 微动开关 > AVM3535613

可能感兴趣的商品

最近浏览过的商品

pic

AVM3535613

厂商:
Panasonic
类别:
微动开关
包装:
-
封装:
-
无铅情况/ROHS:
无铅
描述:
FS型

我要询价我要收藏

  • 参数
  • 描述
参数 数值
端子形状 Internationally common pitch PC terminal
国外标准 UL/CSA/VDE/SEMKO
接触形式 SPDT
OF 0.44N
摆杆安装位置 Standard
电气寿命 2x10^5
触点材料 Gold-clad triple layer
激励器 Hinge long lever
保护构造 IP40
特点 Consistent quality and high precision through sophisticated automatic fabrication system. Low-level circuit types available. Long life version available.
额定 0.1A 125V AC/0.1A 250V AC/0.1A 30V DC
订货产品号 AVM3535613
标准・寿命 Long life

The K30 MCU family is pin, peripheral and software compatible with the K10 MCU family and adds a flexible low-power segment LCD controller with support for up to 320 segments. Devices start from 128 KB of flash in 80-pin LQFP packages extending up to 512 KB in a 144-pin MAPBGA package with a rich suite of analog, communication, timing and control peripherals.

Features


Ultra-Low-Power
  • 110 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents down to 2 µA, and run currents of <350 181="" a="" mhz="" with="" 4="" s="" wake-up="" from="" stop="" mode="">
  • Full memory and analog operation down to 1.71 volts for extended battery life
  • Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
  • Low-power timer for continual system operation in reduced power state

Flash, SRAM and FlexMemory
  • 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection
  • 32 KB-128 KB of SRAM
  • FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup

Mixed-Signal Capability
  • Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering
  • Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications
  • Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state
  • Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost

Performance
  • ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions
  • 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
  • Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth
  • Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines

Timing and Control
  • Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control
  • Carrier modulator timer for infrared waveform generation in remote control applications
  • Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block

Human-Machine Interface
  • Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick
  • Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al

请选择文档类型: