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LQP03TG1N5C02D

厂商:
Murata
类别:
片状电感器
包装:
-
封装:
-
无铅情况/ROHS:
无铅
描述:
片状电感器 (片状线圈)

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  • 参数
  • 描述
  • 文档
参数 数值
工作温度范围 (包含自温升)
工作温度范围 (不包含自温升) -55 to +125℃
直流电阻平均值
质量(标准值) 0.0002g
尺寸代码 (单位为inch) 0201
直流电阻最大值 0.15ohm
额定电流 600mA
宽度 0.3mm ±0.03mm
厚度 0.3mm ±0.03mm
长度 0.6mm ±0.03mm
Q (最小) 13
尺寸代码 (单位为mm) 0603
新品名 LQP03TG1N5C02D
电感值 1.5nH
公差 ±0.2nH
测试频率 500MHz
自谐振频率 (最小) 6000MHz
电磁屏蔽级别

Targeted at audio/video (AV) receivers, home theaters, surround sound decoders, mini stereo systems, digital TV audio systems and automotive audio systems, the DSP56371 is designed to meet the demands of audio electronics system designers by supporting the latest generation decoders, such as Dolby®, THX® and DTS®, among others.

The DSP56371 is capable of running delay management, bass management and DTS96/24 while using less than half of the DSP's computing capability. This enables designers to add system enhancements that the discerning audio consumer expects. The performance increase is made possible through the use of a higher core frequency, fewer memory wait states, a larger amount of on-chip static random access memory (SRAM) and the addition of an enhanced filter coprocessor (EFCOP). By removing the need for external high-speed SRAM and making smaller, less complex boards, the DSP56371 is performance-rich and cost-effective.

View Block Diagram

Features

  • Multimode, multichannel decoder software functionality
  • Dolby and/or DTS license required
    • Prologic II
    • DTS Neo6
    • DTS 2.3
    • WMA
    • AAC
    • Dolby headphone
    • Dolby virtual speaker
  • Digital audio post-processing capabilities
    • Parametric EQ
    • Tone control or graphic EQ
    • Dynamic range compression
    • Loudness
    • Bass boost
    • Speaker comp
    • Fade/balance
    • Music search
    • Compression 
  • DSP core
    • 1.25-volt core with a 3.3-volt peripheral I/O
    • Object code compatible with the DSP56000 core with highly parallel instruction set 
    • Data ALU with a 24 x 24-bit multiplier-accumulator and a 56-bit barrel shifter; 16-bit arithmetic support
    • Program control with position-independent code support and instruction cache support
    • Six-channel DMA controller
    • PLL based clocking with a wide range of frequency multiplications (1 to 255), predivider factors (1 to 3) and power saving clock divider (2I: i=0 to 7); reduces clock noise
    • Internal address tracing support and OnCE for hardware/software debugging
    • JTAG port
    • Very low-power CMOS design, fully static design with operating frequencies down to DC
    • Stop and wait low-power standby modes
    • EFCOP running concurrently with core
  • On-chip memory configuration
    • 16K–48K x 24-bit Y-data RAM and 32K x 24-bit Y-data ROM
    • 36K x 24-bit X-data RAM and 32K x 24-bit X-data ROM
    • 28K–64K x 24-bit program and bootstrap ROM
    • 4K x 24-bit program RAM
    • Various memory switches available 
  • Peripheral modules
    • Enhanced serial audio interface (ESAI_0): up to four receivers and six transmitters, master or slave. I⊃2;S, Sony, AC97, network and other programmable protocols
    • Serial host interface (SHI): SPI and I⊃2;C protocols, 10-word receive FIFO, support for eigth, 16 and 24-bit words.
    • Triple timer module
    • Digital audio transmitter (DAX): one serial transmitter capable of supporting the SPDIF, IE

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详细说明
文档名称 文档类型 软件 描述
LQP03TG1N5C02DPDF下载 点击下载 点击下载 Q-频率特性_(典型值)
LQP03TG1N5C02DPDF下载 点击下载 点击下载 安装
LQP03TG1N5C02DPDF下载 点击下载 点击下载 尺寸
LQP03TG1N5C02DPDF下载 点击下载 点击下载 外观
LQP03TG1N5C02DPDF下载 点击下载 点击下载 参考数据
LQP03TG1N5C02DPDF下载 点击下载 点击下载 数据表
LQP03TG1N5C02DPDF下载 点击下载 点击下载 电感-频率特性_(典型值)
LQP03TG1N5C02DPDF下载 点击下载 点击下载 警告/注意事项
LQP03TG1N5C02DPDF下载 点击下载 点击下载 品名表示法
LQP03TG1N5C02DPDF下载 点击下载 点击下载 包装
LQP03TG1N5C02DPDF下载 点击下载 点击下载 特点