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MC34712EPR2

厂商：
Freescale
类别：
开关调节器
包装：
-
封装：
QFN 24 EP 4SQ*1.0P0.5
无铅情况/ROHS：
无铅
描述：
SINGLE REGULATOR FOR DDR

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  • 参数
  • 描述
  • 文档
参数 数值
2nd Level Interconnect e4
Additional Features - Power Management Disable DC - DC / Power Good High and Low
Package Length (nominal) (mm) 4.000
Peak Package Body Temperature (PPT)(°C) 260
Regulator - Output Current (A) 3
Regulator - Output Voltage 1.5 ADJ down
Leadtime (weeks) 16
Number of Regulators-Boost Switching 0
Package Thickness (nominal) (mm) 1.000
REACH SVHC Freescale REACH Statement
Status Active
Ambient Operating Temperature (Min-Max) (°C) -40 to 85
Maximum Time at Peak Temperature (s) 40
Sample Exception Availability N
Tape & Reel Yes
Protection Short Circuit / Overvoltage / Over Current / Undervoltage / Thermal Shutdown
Halogen Free Yes
Life Cycle Description (code) PRODUCT STABLE GROWTH/MATURITY
Budgetary Price($US) 10000 @ $1.00 each
Additional Features-Analog Standby
Moisture Sensitivity Level (MSL) 3
Number of Reflow Cycles 3
Supply Voltage (Min-Max) (V) 3 to 6
UL94 (plastics flammability test) V0: burning stops within 10 seconds on a vertical specimen; no drips allowed
Package Description and Mechanical Drawing QFN 24 EP 4SQ*1.0P0.5
Preferred Order Quantity (POQ) 2500
Application/Qualification Tier COMMERCIAL
Material Composition Declaration (MCD) Download MCD Report
Package Material Plastic
Micron Size (μm) .27
MPQ Container REEL
Export Control Classification Number (US) EAR99
Part Number MC34712EPR2
Device Function Switching Regulators
Device Weight (g) .04280
Mounting Style Surface Mount
Floor Life 168 HOURS
Minimum Package Quantity (MPQ) 2500
Pin/Lead/Ball Count 24
POQ Container BOX
RoHS Certificate of Analysis (CoA) Download RoHS CoA Report
Description SINGLE REGULATOR FOR DDR
Interface and Input Control Parallel
Diagnostics Parallel
Harmonized Tariff (US) Disclaimer 8542.31.0000
Material Type Tested Packaged Device
Number of Regulators-Buck Switching 1
Package Width (nominal) (mm) 4.000

The MC68360 Quad Integrated Communication Controller (QUICC™) is a versatile one-chip integrated microprocessor and peripheral combination family that can be used in a variety of controller applications.

The MC68360 particularly excels in communications activities. The QUICC can be described as a next-generation MC68302, with higher performance in all areas of device operation, increased flexibility, and higher integration. The term "quad" comes from the fact that there are four serial communications controllers (SCCs) on the device. However, there are actually seven serial channels which include four SCCs, two serial management controllers (SMCs), and one serial peripheral interface (SPI).


Features

  • 32-bit version of the CPU32 core (fully compatible with CPU32)
  • Up to 32-bit Data Bus (Dynamic Bus Sizing for 8- and 16-Bits) + 32 Address Lines
  • Complete static design (0-33 MHz Operation)
  • Slave mode to disable CPU32+ (allows use with external processors)
    • Multiple QUICCs can share one system bus (one master)
    • MC68040 companion mode allows QUICC to be an MC68040 companion chip and intelligent peripheral (29 MIPS at 33 MHz)
    • All QUICC features available in slave mode
  • Memory controller (eight banks)
    • Contains complete Dynamic Random-Access Memory (DRAM) controller
    • Glueless interface to DRAM Single In-Line Memory Modules (SIMMs), Static Random-Access Memory (SRAM),
    • Electrically Programmable Read-Only Memory (EPROM), Flash EPROM, etc.
    • Boot chip select available at Reset (options for 8-, 16-, or 32-bit memory)
    • Special features for MC68040 including Burst Mode
  • Four general-purpose timers
    • Four 16-bit timers or two 32-bit timers
  • Two Independent DMAs (IDMAs)
  • System Integration Module (SIM60)
    • Bus monitor
    • Breakpoint logic provides on-chip H/W breakpoints
    • Spurious interrupt monitor
    • External masters may use on-chip features such as chip selects
    • Periodic interrupt timer
    • On-chip bus arbitration with no overhead for internal masters
    • Low power stop mode
    • IEEE 1149.1 Test Access Port
  • RISC Communications Processor Module (CPM)
    • Many new commands (e.g., Graceful Stop Transmit, Close RxBD)
    • Supports continuos mode transmission and reception on all serial channels
    • 2.5 kbytes of dual-port RAM
    • 14 Serial DMA (SDMA) channels
    • Three parallel I/O registers with open-drain capability
    • Each serial channel can have its own Pins (NMSI mode)
  • Four baud rate generators
  • Four SCCs
    • Ethernet/IEEE 802.3 optional on SCCs 1-2@25 MHz, SCCs 1-3@33 MHz
    • HDLC Bus
    • Universal Asynchronous Receiver Transmitter (UART)
    • Synchronous UART
    • Asynchronous HDLC (RAM microcode option) to support PPP (Point to Point Protocol)
  • Two SMCs
    • UART
    • Transparent
    • General Circuit Interface (GCI) controller
  • One SPI
  • Time-Slot assignor
  • Supports two TDM channels
  • Parallel Interface Port (supports fast connection between QUICCs)

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Data Sheets
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MC34712EPR2PDF下载 点击下载 点击下载 MC34712
Users Guides
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MC34712EPR2PDF下载 点击下载 点击下载 KT34712UG
Application Notes
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MC34712EPR2PDF下载 点击下载 点击下载 AN1902
Fact Sheets
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MC34712EPR2PDF下载 点击下载 点击下载 MC3471216DDRFS
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MC34712EPR2PDF下载 点击下载 点击下载 BRMEDICAL
White Papers
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MC34712EPR2PDF下载 点击下载 点击下载 DATABEANWP
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