The Qorivva MPC564xL family of 32-bit Power Architecture® microcontrollers is designed to specifically address the requirements of the safety standards IEC61508 (SIL3) and ISO26262 (ASIL-D). It reduces design complexity and component count by putting key functional safety features on a single chip with a dual-core, dual-issue architecture, which can be statically switched between lockstep mode (redundant processing and calculations) to decoupled parallel mode (independent core operation). Qorivva MPC564xL microcontrollers are SafeAssure functional safety solutions.
Features
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Dual e200 Z4 CPU architecture
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Dual processing spheres including; CPU, DMA, interrupt controller, crossbar and MPU for logic level fault detection
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Two statically configurable modes of operation: Lockstep operation (redundant processing and calculations) and dual parallel mode (independant core operation)
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Fault collection unit, which monitors and manages fault events
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Error correction coding on RAM and flash memory allows detection/correction of memory errors
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Designed to address safety requirements outlined in IEC61508 and ISO26262
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Robust communications with FlexRay™ and CAN/safety port high-speed low latency messaging
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Cross-triggering unit coordinates ADC, timer and PWM generation and minimizes CPU interrupt load
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eTimer x 3
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ADC x 2
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Short and Mid Range Adaptive Cruise Control (up to 100m)
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Vehicle Dynamic and Chassis Control
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