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DSP56321VF275

厂商:
Freescale
类别:
DSP
包装:
-
封装:
MAPBGA 196 15*15*0.8P1.0
无铅情况/ROHS:
有铅
描述:
HIP7 56321 275MHZ DSP MAP

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  • 参数
  • 描述
  • 文档
参数 数值
Ambient Operating Temperature (Min-Max) (°C) -40 to 100
Application/Qualification Tier COMMERCIAL, INDUSTRIAL
Bus Frequency (Max) (MHz) 275
Cache (kByte) 1
Co Processor Frequency (Max) (MHz) 275
Co Processor Type EFCOP
Core: Number of cores (Spec) 1
Core: Operating Frequency Max (Max) (MHz) 275
Core: Operating Voltage (Spec) (V) 1.6
Core: Performance in MACS 275000000
Core: Type DSP56300
Debug Features On-Chip Emulation
Export Control Classification Number (US) 3A991
External Bus Interface HI08 / Memory Controller
External Bus Width (bit) 24
External Interrupts 4
External Memory Supported SRAM / SDRAM
Floor Life 168 HOURS
Harmonized Tariff (US) Disclaimer 8542.31.0000
Internal RAM (kByte) 576
Leadtime (weeks) 12
Life Cycle Description (code) PRODUCT MATURITY/SATURATION
Material Composition Declaration (MCD) Download MCD Report Download MCD Report
Material Type Tested Packaged Device
Maximum Time at Peak Temperature (s) 40
Micron Size (μm) .13
Minimum Package Quantity (MPQ) 126
Moisture Sensitivity Level (MSL) 3
Mounting Style Surface Mount
MPQ Container TRAY
Number of Reflow Cycles 3
Package Material Plastic
Pin/Lead/Ball Count 196
REACH SVHC Freescale REACH Statement
RoHS Certificate of Analysis (CoA) Contact Us
Sample Exception Availability Y
Standby Function WAIT / STOP
Tape & Reel No
Timers - Channels 3
Timers - Number of Timers 3
Timers - Size (bit) 24
Total DMA Channels 6
Description HIP7 56321 275MHZ DSP MAP
Part Number DSP56321VF275
Timer Features Watchdog / PWM / Output Compare / Input Capture / Realtime Interrupts
Device Production Availability 24 Feb 2005
Pb-Free No
Serial Interface - Number of Interfaces 2 / 1
Peak Package Body Temperature (PPT)(°C) 260
UL94 (plastics flammability test) V0: burning stops within 10 seconds on a vertical specimen; no drips allowed
Budgetary Price($US) 100 @ $46.50 each
Package Thickness (nominal) (mm) 1.750
Device Sample Availability 24 Feb 2005
Device Weight (g) .63870
Package Length (nominal) (mm) 15.000
Package Width (nominal) (mm) 15.000
Package Description and Mechanical Drawing MAPBGA 196 15*15*0.8P1.0
I/O Pins 34
RoHS Compliant No
Status Active
Preferred Order Quantity (POQ) 1260
Serial Interface - Type SSI / SCI

The DSP56321, a member of the DSP56300 family of programmable DSPs, supports network applications with general filtering operations. The on-chip enhanced filter coprocessor (EFCOP) executes filter algorithms in parallel with core operations to provide enhanced signal quality without affecting channel throughput or total number of channels supported, resulting in increased overall performance. Like the other family members, the DSP56321 uses a high-performance, single clock cycle per instruction engine, a barrel shifter, 24-bit addressing, instruction cache, and direct memory access (DMA) controller. The DSP56321 offers 275 million multiply accumulates per second (MMACS) performance (550 MMACS using the EFCOP in filtering applications) using an internal 275 MHz clock, a 1.6-volt core and independent 3.3-volt input/output (I/O).

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Features

High-performance DSP56300 core:
  • 275 MMACS (550 MMACS using the EFCOP in filtering applications) with a 275 MHz clock at 1.6 volts
  • Object code compatible with the DSP56000 core with highly parallel instruction set
  • Data arithmetic logic unit (data ALU) with fully pipelined 24 x 24-bit parallel multiplier-accumulator (MAC), 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation and parsing), conditional ALU instructions and 24-bit or 16-bit arithmetic support under software control
  • Program control unit (PCU) with position-independent code (PIC) support, addressing modes optimized for DSP applications (including immediate offsets), on-chip instruction cache controller, on-chip memory-expandable hardware stack, nested hardware DO loops and fast auto-return interrupts
  • DMA with six channels supporting internal and external accesses; one-, two-, and three-dimensional transfers (including circular buffering); end-of-block- transfer interrupts; and triggering from interrupt lines and all peripherals
  • Digital phase-lock loop (DPLL) allows change of low-power divide factor (DF) without loss of lock
  • Hardware debugging support including on-chip emulation (OnCE) module, JTAG test access port (TAP)
Enhanced filter coprocessor (EFCOP):
  • Internal 24 x 24-bit filtering and echo-cancellation coprocessor
  • Runs in parallel to the DSP core
Internal memories:
  • 192K x 24-bit on-chip RAM total
  • Program RAM, instruction cache, X data RAM and Y data RAM sizes are programmable: * Includes 12 K x 24-bit shared memory (that is, memory shared by the core and the EFCOP).
  • 192 x 24-bit bootstrap ROM
External memory expansion:
  • Up to two 256K x 24-bit word memory spaces using the standard external address lines
  • Program memory expansion to one 256K x 24-bit word memory space using the standard external address lines
  • External memory expansion port
  • Chip select logic for glueless interface to SRAMs
Internal peripherals:
  • 3.3-volt I/O interface enhanced 8-bit parallel host interface (HI08) supports a variety of buses (for example, ISA) and provides glueless connection to a number of industry-standard microcomputers, microprocessors and DSPs
  • Two enhanced synchronous serial interfaces (ESSI0 and ESSI1), each with one receiver and three transmitters
  • Serial communications interface (SCI) with baud-rate generator
  • Triple timer module
  • Up to 34 programmable general-purpose I/O (GPIO) signals, depending on which peripherals are enabled
Reduced power dissipation:
  • Very low-power CMOS design
  • Wait and stop low-power standby mode

Users Guides
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 DSPSTUDIOUG
DSP56321VF275PDF下载 点击下载 点击下载 DSPS56SIMUM
DSP56321VF275PDF下载 点击下载 点击下载 S56CCSERVER
Application Notes
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 AN1764
DSP56321VF275PDF下载 点击下载 点击下载 AN1781
DSP56321VF275PDF下载 点击下载 点击下载 AN1839
DSP56321VF275PDF下载 点击下载 点击下载 AN2074
DSP56321VF275PDF下载 点击下载 点击下载 AN2085
DSP56321VF275PDF下载 点击下载 点击下载 AN1829
DSP56321VF275PDF下载 点击下载 点击下载 AN1790
DSP56321VF275PDF下载 点击下载 点击下载 AN2277
DSP56321VF275PDF下载 点击下载 点击下载 AN2691
DSP56321VF275PDF下载 点击下载 点击下载 AN1751
DSP56321VF275PDF下载 点击下载 点击下载 AN1772
DSP56321VF275PDF下载 点击下载 点击下载 AN1808
DSP56321VF275PDF下载 点击下载 点击下载 APR30
DSP56321VF275PDF下载 点击下载 点击下载 AN2088
DSP56321VF275PDF下载 点击下载 点击下载 APR27
DSP56321VF275PDF下载 点击下载 点击下载 APR23
DSP56321VF275PDF下载 点击下载 点击下载 APR35
DSP56321VF275PDF下载 点击下载 点击下载 AN2715
DSP56321VF275PDF下载 点击下载 点击下载 AN3653
DSP56321VF275PDF下载 点击下载 点击下载 AN3754
DSP56321VF275PDF下载 点击下载 点击下载 APR25
DSP56321VF275PDF下载 点击下载 点击下载 APR39
DSP56321VF275PDF下载 点击下载 点击下载 APR20
DSP56321VF275PDF下载 点击下载 点击下载 APR26
DSP56321VF275PDF下载 点击下载 点击下载 APR38
DSP56321VF275PDF下载 点击下载 点击下载 APR40
DSP56321VF275PDF下载 点击下载 点击下载 AN2013
Brochures
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 BRPACKTELEARCH
DSP56321VF275PDF下载 点击下载 点击下载 BRDSPPARMETRIC
DSP56321VF275PDF下载 点击下载 点击下载 BYNDDSPBRO
Engineering Bulletins
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 EB336
DSP56321VF275PDF下载 点击下载 点击下载 EB610
DSP56321VF275PDF下载 点击下载 点击下载 EB635
DSP56321VF275PDF下载 点击下载 点击下载 EB365
DSP56321VF275PDF下载 点击下载 点击下载 EB724
Product Briefs
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 DSP56321PB
Errata
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 DSP56321CE0K93M
DSP56321VF275PDF下载 点击下载 点击下载 DSP56321CE1K91M
Reference Manuals
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 DSP563XXEVMEUM
DSP56321VF275PDF下载 点击下载 点击下载 DSPLNKRRM
DSP56321VF275PDF下载 点击下载 点击下载 DSP56321RMAD
DSP56321VF275PDF下载 点击下载 点击下载 DSP56321RM
DSP56321VF275PDF下载 点击下载 点击下载 DSP56300FM
DSP56321VF275PDF下载 点击下载 点击下载 DSP56300FMAD
DSP56321VF275PDF下载 点击下载 点击下载 DSPASMRM
Selector Guides
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 SG1004Q22009
Fact Sheets
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 SUITE56FACT
Data Sheets
文档名称 文档类型 软件 描述
DSP56321VF275PDF下载 点击下载 点击下载 DSP56321