The Qorivva MPC5746M Power Architecture® MCU is Freescale's first powertrain device supporting more than two processing cores and peripherals to meet next-generation advanced engine control, functional safety and security requirements.
The MPC5746M is part of the SafeAssure program, which is designed to help system manufacturers achieve compliance with functional safety standards such as ISO 26262 for ASIL-D safety integrity. In order to minimize additional software and module level features to reach this target, on-chip redundancy is offered for the critical components of the microcontroller (multiple CPU computational cores with delayed lockstep, I/O processor core, DMA controller, interrupt controller, dual crossbar bus system, memory protection unit, fault collection unit, flash memory and RAM controllers, peripheral bus bridge, system and watchdog timers and end to end ECC).
Features
Main Features
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Two independent e200z4 cores operating up to 200 MHz
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Single 200 MHz e200z4 core for delayed lockstep
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Single e200z4 I/O core operating up to 200 MHz
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On-chip DSP and floating point unit
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Built to support functional safety (ISO 26262 / ASIL-D)
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120-channel general timer module (GTM103)
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Up to 64-channel eDMA
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Up to 60-channel analog-to-digital converters (ADC)
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Includes 6 x ΣΔ ADC converters
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Single 200 MHz e200z4 core for delayed lockstep
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Single e200z4 I/O core operating up to 200 MHz
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Includes 6 x ΣΔ ADC converters
Memory Capability
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4 MB flash memory w/ error code correction (ECC)
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Up to 320 KB of total SRAM w/ECC
Communication Protocols
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Ethernet controller (FEC)
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3 x M-CAN and 1 x TT-CAN
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5 x LINFlex
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7 x dSPI and 1 x IIC
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3 x PSI-5 and 10 x SENT
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LFAST SIPI support
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Dual-channel FlexRay™ controller
Additional Features
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Hardware security module (HSM)
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Aurora debug and trace support
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176-pin LQFP package (with exposed pad)
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292-pin PBGA package
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